This invention relates generally to parallel data processing techniques and computer systems, and specifically to those of a type where each of a plurality of parallel processors simultaneously executes the same instruction on different data. Such a computer is commonly termed a single instruction, multiple data stream (SIMD) processor.
There are many data processing applications wherein multiple streams of data may be processed in the same manner. An example is in the field of computer graphics where separate video red, green, blue and alpha digital signals may be processed identically. To achieve the highest processing rate, it is thus convenient to process these four data streams simultaneously with the same sequence of instructions. That is, at any given instant, separate red, green, blue and alpha data for a particular color display pixel are being simultaneously processed.
Parallel processing is particularly fast if the program being executed on the parallel streams of data is an invariant series of statements. It is more common, however, that the controlling program includes conditional statements that depend for execution upon the data in each of the parallel processors. Since the data being processed in each stream will be different, provision must be made in this case for those processors whose data does not meet the condition of the program statement to be rendered non-operative during the time that the remaining processors are executing the particular statement. It is known that a WHILE-DO construct is the minimum needed to implement all possible flow control structures.
A common example of such a conditional program instruction is an "IF-THEN" statement: that is, the individual processors are all instructed to perform a certain manipulation of their individual data streams, but only "if" their data meets a certain condition expressed in the program instruction. Those processors whose data at that instant do not meet the condition do not execute that instruction. An "IF-THEN" instruction is often augmented by an "ELSE" modifier; that is, those processors not executing the "IF-THEN" statement are subsequently instructed to execute a different operation on their data at the next instant while those processors who did execute the "IF-THEN" instruction are rendered inoperative.
It is a general object of the present invention to provide improved techniques and circuits for selectively controlling which of a plurality of parallel processors execute specific conditional instructions.